1. Field of the Invention
The present invention relates to a loop type data highway system, in which some stations are dispersedly distributed in a wide area and are connected into a closed loop through a common bus.
2. Description of the Prior Art
In a data highway system of this kind, it is customary that one of the stations becomes a key station for feeding a reference clock signal to the highway for transmitting and receiving data having a predetermined clock, whereas the remaining stations extract a timing signal from the data signals received so that the clock signals corresponding to the aforementioned reference clock are reproduced for use by a phase locked loop. At each station, the data to be transmitted and received is received and transmitted by being demodulated and modulated by the use of that reference clock. The transmission of the data from one station to another station is performed through the reception and transmission by the stations located on the data highway between the aforementioned two stations.
When a phase locked loop is to be utilized, there can be attained an advantage in that the transmission and reception can be effected without transmitting the clock signal, on which the operations are based, to the stations through another independent transmission line. On the other hand, there results the following disadvantage. Specifically, even when the input signal disappears, a clock signal similar to the normal clock continues to be generated for a predetermined time period. As a result, there is a possibility of generating erroneous received data. Unfortunately, a phase locked loop operates in a so-called "free run oscillation" if it is left in an input signal interrupted state, so that it oscillates at an oscillatory frequency intrinsic to each phase locked loop. In the loop transmission system, moreover, if the transmission data due to the intrinsic oscillatory frequency is transmitted from the station at such a free run oscillation state to a next station, the phase locked loop of each station may effect synchronous extraction due to the dispersion in the characteristics of the constituting parts, the differences in the temperature characteristics or the like by the free run frequency of the phase locked loop of the preceding station. In this case, erroneous received data is also generated.
In order to prevent those erroneous operating states, the following operations are required for the stations from the construction of the system:
(1) At each station, a no input signal condition, if any, is detected as promptly and accurately as possible so that the erroneous operations of the stations are prevented, upon the detection, for example, by supressing the received data. PA1 (2) The no input signal state detected at each station is transmitted without fail so that the system as a whole is prevented from erroneously operating. PA1 (1) As soon as the input signal interruption is detected, the transmission signal is instantly stopped. PA1 (2) The detection result of the input signal interruption is held for a predetermined period, i.e., for a longer period than that for which it is possible to judge that the phase locked loop is operating with the free run frequency. PA1 (3) The restart of the transmission signal is permitted on the following conditions:
As has been disclosed in Japenese Patent Laid-Open No. 52-95104, for example, according to the prior art, there is proposed a concept in which the feeding of the signal to be transmitted is stopped at the station in which the input signal interruption is detected, by the elimination of the periodicity of the input signal thereby to solve the aforementioned problem.
As the speed of the highway system is raised, however, a receiver has a tendency of receiving the input signal in the form of an AC signal using AC coupled amplifiers connected in cascade. This is advantageous in the aspects of the improvements in the frequency responding characteristics of the receiver and the amplification factor for the input signal but is disadvantageous in that each receiver starts its oscillations with its intrinsic frequency within a relatively short time period when the input signal is interrupted.
By simply monitoring the periodicity of the input signal, therefore, as in the aforementioned well known example, the detection of the input signal interruption can not be accomplished when the receiver starts to generate an oscillatory signal having the frequency of the amplifier.
It is also proposed that the asymmetry of a PLL is detected by monitoring the output of a low-pass filter, for example.
However, since the PLL is equipped with a low-pass filter having a high time constant, the period between the no input signal state and the asymmetry of the PLL becomes so long that the detection is accordingly delayed. As a result, the erroneous received data is likewise fed out during that delay period.